This invention is in the field of wireless communications, and is more specifically directed to receiver circuitry used in such communications.
The popularity of mobile wireless communications has increased dramatically over recent years. It is expected that this technology will become even more popular in the foreseeable future, both in modern urban settings, and also in rural or developing regions that are not well served by line-based telephone systems. This increasing wireless traffic strains the available communications bandwidth for a given level of system infrastructure. As a result, there is substantial interest in increasing bandwidth utilization of wireless communications system to handle this growth in traffic.
This trend toward heavier usage of wireless technologies for communications, in combination with the advent of so-called third-generation, or “3G”, wireless communications that also carry data, video, and other high data rate payloads, will require continuing improvements in the processing capabilities of the communications equipment. In particular, the higher required data rates will require corresponding increases in the digital processing of the communications payloads.
Modern digital communications technology utilizes multiple-access techniques to increase bandwidth utilization, and thus to carry more wireless traffic. Under current approaches, both time division multiple access (TDMA) and code division multiple access (CDMA) techniques are used in the art to enable the simultaneous operation of multiple communication sessions, or wireless “connections”, each involving voice communications, data communications, or any type of digital payload. As evident from the name, TDMA communications are performed by the assignment of time slots to each of multiple communications, with each conversation transmitted alternately over short time periods. CDMA technology, on the other hand, permits multiple communication sessions to be transmitted simultaneously in both time and frequency, by modulating the signal with a specified code. On receipt, application of the code will recover the corresponding conversation, to the exclusion of the other simultaneously received conversations.
Wideband CDMA (WCDMA) is an extension of CDMA communications, and is contemplated to be useful for enhanced services such as contemplated in 3G wireless. WCDMA involves a higher chip rate than in conventional CDMA, and thereby supports higher bit rates, increases spectrum efficiency by way of better statistical averaging, and provides better coverage by improving frequency diversity.
In the receipt of wireless communications devices, digital receiver circuitry in general performs the function of converting the received high frequency signal to a “baseband” signal output. As known in the art, the term “baseband” refers to the signal at its original band of frequencies. The baseband signal is typically in its multiplexed form, for example corresponding to multiple communications that are carried out on multiple time or code channels, depending upon whether the communications are TDMA, CDMA, or WCDMA.
Modern wireless systems place stringent demands on the analog filtering and digital processing of received signals. These demands arise from the high frequencies involved in conventional wireless communications, such frequencies typically in the radio frequency (RF) bands, and also from the relatively low received signal power levels. As a result, relatively costly and complex techniques are commonplace in these systems.
For example, surface acoustic wave (SAW) filters are often used in conventional wireless receivers, for example in implementing band pass filters. As known in the art, conventional SAW filters include a piezoelectric substrate, on the surface of which input and output sets of interdigitated metal fingers are formed. The bandpass filtering is effected by the received signal being applied to the input set of interdigitated metal fingers, with surface acoustic waves excited by the piezoelectric substrate in response to the electric field generated between the electrodes. These acoustic waves propagate along the surface of the substrate and are received at the output set of interdigitated fingers, at which the piezoelectric substrate produces electrical signals in response to the surface acoustic waves. The wavelength of the output signals are determined by the lengths of the output fingers. Conventional SAW devices readily attain high frequency performance (with Q values up to on the order of 1000) while remaining relatively compact, in comparison with an equivalent electrical filter. However, because of the piezoelectric substrate, SAW filters are not integratable with conventional semiconductor integrated circuits. Accordingly, the use of SAW filters adds significantly to system cost.
Various conventional receiver architectures are now used in modern wireless systems, such as base stations and wireless handsets. These classes of architectures include heterodyne receivers, direct conversion receivers, and digital mixer architectures. FIG. 1 illustrates a first example of conventional heterodyne receiver 10. Receiver 10 includes SAW bandpass filter 2, which receives input RF signal RFI, and passes its filtered output to low noise amplifier (LNA) 4. The amplified signal is then downconverted by first mixer 6, which is typically an active mixer (gain>unity) that generates an output signal at an intermediate frequency that is the difference between the amplified RF input signal RFI and local oscillator signal LO1. This downconverted signal is then filtered by second SAW bandpass filter 8, and applied to automatic gain control (AGC) 12. The filtered downconverted signal at the intermediate frequency is then downconverted to baseband by I-Q mixers 14, which again are greater-than-unity gain analog mixers applying a periodic signal from a second local oscillator (not shown). The downconverted baseband signal is filtered by analog low-pass filter 16. Analog-to-digital converter (ADC) 18 samples and converts the baseband signal, at a sampling frequency that satisfies the Nyquist criterion of twice the bandwidth of the communicated signal. The digital signal is then decimated by decimating filter 19 to reduce the data rate, following which the signal is ready for demodulation and decoding.
However, this conventional heterodyne architecture is quite costly to implement, and also consumes a great deal of power, which is problematic for battery-powered devices such as wireless telephone handsets. A primary reason for this high power consumption and high cost derives from the use of SAW filters 2, 8, which necessarily consume significant power and must be realized off-chip, as described above. Because analog mixers 6, 8 operate at relatively low chopping frequencies, with greater than unity gain, high-Q filters such as SAW filters are required for reasonable fidelity. The multiple downconversions necessary to bring the input signal to baseband exacerbate these issues.
Another type of conventional receiver reduces these noise issues by using only a single mixer to directly downconvert the RF signal to baseband. FIG. 2 illustrates an example of this type of architecture, in the form of conventional direct conversion receiver 20. In this example, SAW filter 22 receives input signal RFI, and applies the bandpass filtered signal to LNA 24. I-Q stage mixer 26 downconverts this filtered amplified input signal to baseband. Low pass filter 28 and AGC 29 clean up this downconverted signal, prior to digitization by ADC 31 and decimating by decimating filter 33, similarly as described above. While this architecture reduces the cost of manufacture relative to the heterodyne architecture of FIG. 1, the use of only one level mixer for downconversion causes this architecture to suffer from DC offset problems, significant even-order distortion, and flicker noise.
FIG. 3 illustrates a conventional receiver architecture of the low-IF digital mixer type, which is effectively a compromise between the heterodyne and direct conversion receivers of FIGS. 1 and 2. As shown in FIG. 3, receiver 30 receives the RF input signal RFI with SAW bandpass filter 32, and applies the filtered output to LNA 34 as before. A single mixer 36 downconverts the filtered input signal to an intermediate frequency, which is again filtered by second SAW filter 38, and adjusted by AGC 39. ADC 41 converts the signal to digital, at a sampling frequency that is four times the intermediate frequency to which mixer 36 downconverted the input signal. I-Q mixer 45 then downconverts the digital signal, by applying a pattern of {−1, 0, +1, 0, 1, . . . }, at the sampling frequency, to the digital samples from ADC 43. This digital mixing by mixer 45 effectively applies a sinusoid of one-fourth of the sampling frequency to the digital output. Decimating filter 47 reduces the output data rate.
Digital mixer receiver 30 of FIG. 3 is a compromise of the heterodyne and direct conversion receivers, in that it still uses two stage mixers, but only one mixer is an analog mixer. The second, digital, mixer is not as sensitive to noise and distortion as an analog mixer, and thus receiver 30 is contemplated to provide good performance. In addition, the I & Q signals are generated in the digital domain, thus the matching between the I & Q branches is optimized. However, two SAW filters are still required in digital mixer receiver 30, maintaining relatively high cost for this approach.